1. Field of the Invention
The present invention relates to a method, system, and program for adding operations identifying data packets to structures.
2. Description of the Related Art
In computer systems, components are coupled to each other via one or more buses. A variety of components can be coupled to a bus, thereby providing intercommunication between all of the various components. An example of a bus that is used for data transfer between a memory and another device is the peripheral component interconnect (PCI) bus.
In order to relieve a processor of the burden of controlling the movement of blocks of data inside of a computer, direct memory access (DMA) transfers are commonly used. With DMA transfers, data can be transferred from one memory location to another memory location, or from a memory location to an input/output (I/O) device (and vice versa), without having to go through the processor. Additional bus efficiently is achieved by allowing some of the devices connected to the PCI bus to be DMA masters.
When transferring data using DMA techniques, high performance Input/Output I/O controllers, such as gigabit Ethernet media access control (MAC) network controllers may be used. In particular, a host computer includes an Input/Output (I/O) controller for controlling the transfer of data packets to or from, for example, other computers or peripheral devices across a network, such as an Ethernet local area network (LAN). The term “Ethernet” is a reference to a standard for transmission of data packets maintained by the Institute of Electrical and Electronics Engineers (IEEE) and one version of the Ethernet standard is IEEE std. 802.3, published Mar. 8, 2002.
To read a data buffer of a memory using DMA transfers, such as when the data has to be retrieved from memory in response to a transmit command from an operating system so that the data can be transmitted by the I/O controller, a device driver for the I/O controller prepares the data buffer. A transmit command may be any indication that notifies the device driver of a data packet to be transferred, for example, over a network. The device driver writes one or more descriptors (i.e., that include the data buffer's physical memory address and length, etc.) to a command register of the I/O controller to inform the I/O controller that one or more descriptors are ready to be processed by the I/O controller. The I/O controller then DMA transfers the one or more descriptors from memory to another buffer and obtains the data buffer's physical memory address, length, etc. After the I/O controller has processed the one or more descriptors, the I/O controller can DMA transfer the contents/data in the data buffer.
A priority may be assigned to the data packets. For instance, for an Ethernet LAN, data packets are assigned a priority ranging from level 0 to 7, with 7 reflecting the highest priority level.
Some I/O controllers maintain one queue for storing high priority data packets that are waiting to be transferred and another queue for storing low priority data packets that are waiting to be transferred. Then, data packets are selected from the two queues and transferred with a round robin technique (i.e., a data packet from the high priority queue is selected for transfer, then a data packet from the low priority queue is selected for transfer, a data packet from the high priority queue is selected for transfer, etc.) by the I/O controller. Moreover, it is possible that low priority data packets may be transferred before queued high priority data packets. For example, if the majority of data packets are high priority, such as streaming audio or video data, the high priority queue may have several high priority data packets waiting to be transferred. If a low priority data packet is then stored in the low priority queue, which has few or no other pending data packets, the round robin selection of data packets for transfer would select the low priority data packet for transmission before selecting a pending high priority data packet.
This leads to a disruption of the transfer of high priority data packets (e.g., streaming audio or video data or protocol control packets). Therefore, there is a need for an improved technique for processing data packets in queues.